217 UInt_t start_index = 0;
219 for(i=0; i<num_words; i++ ) {
220 if(buffer[i] == (UInt_t)
fSlot) start_index = i;
225 Int_t F1_16Bits = 0xFFFF;
226 Int_t F1_9Bits = 0x01FF;
228 Double_t buffer_range = (Double_t) F1_16Bits + 1.0;
229 Double_t trig_range = (Double_t) F1_9Bits + 1.0;
233 fBuffer[j] = buffer[start_index+1+j] & F1_16Bits;
256 Double_t f1tdc_internal_reference_clock_ns = 25.0;
268 exponent = (
fBuffer[10] >> 8 ) & 0x7;
310 Double_t actual_time_difference = 0.0;
318 if (ref_time !=0.0) {
322 Double_t time_condition = 0.0;
323 Double_t local_time_difference = 0.0;
325 local_time_difference = raw_time - ref_time;
327 if(local_time_difference != 0.0) {
329 time_condition = fabs(local_time_difference);
331 if(time_condition < trigger_window) {
333 actual_time_difference = local_time_difference;
337 if (local_time_difference > 0.0) {
339 actual_time_difference = local_time_difference - time_offset;
344 actual_time_difference = local_time_difference + time_offset;
355 actual_time_difference = local_time_difference;
402 return actual_time_difference;
412 printf(
"System %s F1TDC ROC %2d, Slot %2d TDC id %2d Bank id %2d\n",
429 else printf(
"High Resolution mMode ");
434 printf(
"Synchronous mode ");
438 printf(
"Non Synchronouse mode \n");
443 printf(
"refclkdiv = %5d, hsdiv = %6d, bin_size(ns) = %10.5f, full_range(ns) = %8.2f\n",
445 printf(
"trigwin = %5d, triglat = %6d, window (ns) = %10.5f, latency (ns) = %8.2f\n",
489 error += error_counter[i];
553 if(system_name.Contains(
"R2") || system_name.Contains(
"R3")){
554 QwMessage <<
"System " << std::setw(4) << system_name
555 <<
" QwF1TDC obj at " <<
this
557 <<
" CH " << std::setw(2) << channel
558 <<
" OFO " << this->
GetOFO(channel)
559 <<
" RLF " << this->
GetRLF(channel)
560 <<
" TFO " << this->
GetTFO(channel)
561 <<
" EMM " << this->
GetEMM(channel)
562 <<
" SEU " << this->
GetSEU(channel)
563 <<
" FDF " << this->
GetFDF(channel)
564 <<
" SYN " << this->
GetSYN(channel)
565 <<
" HFO " << this->
GetHFO(channel)
578 <<
" QwF1TDC object at " <<
this
597 <<
" QwF1TDC object at " <<
this
619 TString error_counter;
620 error_counter = Form(
"Error Counter F1TDC ROC%2d",
fROC);
621 error_counter += Form(
" Slot%2d",
fSlot);
623 error_counter +=
" OFO : ";
624 error_counter += this->
GetOFO(channel);
625 error_counter +=
" RLF : ";
626 error_counter += this->
GetRLF(channel);
627 error_counter +=
" TFO : ";
628 error_counter += this->
GetTFO(channel);
629 error_counter +=
" EMM : ";
630 error_counter += this->
GetEMM(channel);
631 error_counter +=
" SEU : ";
632 error_counter += this->
GetSEU(channel);
633 error_counter +=
" FDC : " ;
634 error_counter += this->
GetFDF(channel);
635 error_counter +=
" SYN : ";
636 error_counter += this->
GetSYN(channel);
637 error_counter +=
" RFM : ";
639 error_counter +=
" HFO : ";
640 error_counter += this->
GetHFO(channel);
644 return error_counter;
652 TString error_counter;
654 error_counter = Form(
"Error Counter F1TDC ROC%2d",
fROC);
655 error_counter += Form(
" Slot%2d",
fSlot);
663 return error_counter;
670 TString error_counter;
672 error_counter = Form(
"Error Counter F1TDC ROC%2d",
fROC);
673 error_counter += Form(
" Slot%2d",
fSlot);
675 error_counter +=
" OFO : ";
677 error_counter +=
" RLF : ";
679 error_counter +=
" TFO : ";
681 error_counter +=
" EMM : ";
683 error_counter +=
" SEU : ";
685 error_counter +=
" FDC : " ;
687 error_counter +=
" SYN : ";
689 error_counter +=
" HFO : ";
693 return error_counter;
700 printf(
"-------------------------------------------------------------------------------- \n");
701 printf(
"%s : Roc%2d, slot%d is trouble now, please contact jhlee or rakithab immediately\n",
703 printf(
"-------------------------------------------------------------------------------- \n");
721 os << std::setw(2) << f1tdc.
fROC;
723 os << std::setw(2) << f1tdc.
fSlot;
782 #if ROOT_VERSION_CODE < ROOT_VERSION(5,90,0)
819 printf(
"AddQwF1TDC at pos %d\n", pos);
842 while ( (obj = next()) )
849 if((roc_num == roc) && (slot_num == slot) ) {
871 while ( (obj = next()) )
875 if( f1_idx == tdc_index ) {
897 while ( (obj = next()) )
902 if((bank_idx == bank_index) && (slot_num == slot) ) {
1125 QwWarning <<
"QwF1TDContainer::SetSystemName "
1127 <<
" is already registered."
1133 Form(
"%s F1TDC Board Error Status Histogram",
fSystemName.Data())
1145 QwMessage <<
"\nQwF1TDContainer::Print() "
1146 <<
" QwF1TDContainer in System : "
1148 <<
", DetectorType "
1152 <<
", How many F1TDCs are : "
1158 while ( (obj = next()) )
1162 F1 -> PrintF1TDCBuffer();
1163 F1 -> PrintF1TDCConfigure();
1173 TString tmp = Form(
"There is no F1TDC with ROC%2d and SLOT%2d in System %s\n",
1182 TString tmp = Form(
"There is no F1TDC with TDCINDEX%2d in System %s\n",
1240 Double_t old_r = 0.0;
1241 Double_t new_r = 0.0;
1245 TObject* obj = NULL;
1247 while ( (obj = next()) )
1252 if(old_r not_eq new_r) {
1254 printf(
"%s : QwF1TDContainer::GetF1TDCResolution(): F1TDC configurations are corrupted!\n",
1275 Double_t old_r = 0.0;
1276 Double_t new_r = 0.0;
1280 TObject* obj = NULL;
1284 while ( (obj = next()) )
1290 if(old_r not_eq new_r) {
1292 printf(
"%s : QwF1TDContainer::GetF1TDCTriggerRollover(): F1TDC configurations are corrupted!\n",
1324 TObject* obj = NULL;
1326 while ( (obj = next()) )
1332 if(old_c not_eq new_c) {
1334 printf(
"%s : QwF1TDContainer::GetF1TDCChannelNumber(): F1TDC configurations are corrupted!\n",
1353 printf(
"-----------------------\n");
1355 TObject* obj = NULL;
1356 while ( (obj = next()) )
1360 F1 -> PrintTotalErrorCounter();
1362 printf(
"-----------------------\n");
1371 TList *error_list =
new TList;
1372 error_list->SetOwner(
true);
1375 TObject* obj = NULL;
1377 while ( (obj = next()) )
1381 error_list -> Add(
new TObjString(error));
1411 Bool_t hit_fifo_overflow_flag = kFALSE;
1412 Bool_t output_fifo_overflow_flag = kFALSE;
1413 Bool_t chip_resolution_lock_flag = kTRUE;
1416 Bool_t event_ok_flag = kFALSE;
1417 Bool_t trig_time_ok_flag = kFALSE;
1418 Bool_t trig_fifo_ok_flag = kFALSE;
1421 Bool_t data_integrity_flag = kFALSE;
1422 Bool_t data_integrity_unlock_flag = kTRUE;
1426 Bool_t xor_setup_flag = kFALSE;
1427 Bool_t fake_data_flag = kFALSE;
1430 UInt_t slot_number = 0;
1431 UInt_t channel_number = 0;
1432 UInt_t chip_address = 0;
1433 UInt_t channel_address = 0;
1435 UInt_t reference_trig_time = 0;
1436 UInt_t reference_event_num = 0;
1439 Double_t trigger_rollover = 0.0;
1440 Int_t rounded_trigger_rollover = 0;
1441 Int_t diff_trigger_time = 0;
1444 rounded_trigger_rollover = (Int_t) trigger_rollover;
1447 if(
fLocalDebug) printf(
"roc_id %d trigger rollover %f, %d\n", roc_id, trigger_rollover, rounded_trigger_rollover);
1450 const Int_t valid_trigger_time_offset[3] = {0, 1, rounded_trigger_rollover};
1456 <<
" ROC " << roc_id
1457 <<
" num_words (buffer size) " << num_words
1461 Int_t subsystem_cnt = 0;
1465 printf(
"%s at %s nwrds %d\n",
1469 for (UInt_t i=0; i<num_words ; i++)
1476 std::cout <<
"[" << std::setw(3) << i
1477 <<
"," << std::setw(3) << i
1512 roc_idx = Form(
"R%2d-S%2d", roc_id, slot_number);
1527 if(not trig_fifo_ok_flag) {
1530 this ->
AddTFO(roc_id, slot_number, channel_number);
1537 printf(
"The first word of F1TDC must be header word. Check CODA stream and QwF1TDContainer::CheckDataIntegrity fucntion.\n");
1551 std::cout <<
"[" << std::setw(3) << i
1552 <<
"," << std::setw(3) << subsystem_cnt
1563 if(hit_fifo_overflow_flag) {
1565 this->
AddHFO(roc_id, slot_number, channel_number);
1572 std::cout <<
"There is the Hit FIFO Overflow on the F1TDC board at"
1573 <<
" ROC " << roc_id
1574 <<
" Slot " << slot_number
1575 <<
" Ch " << std::setw(3) << channel_number
1576 <<
"[" << chip_address
1577 <<
"," << channel_address
1583 if(output_fifo_overflow_flag) {
1585 this->
AddOFO(roc_id, slot_number, channel_number);
1588 std::cout <<
"There is the Output FIFO Overflow on the F1TDC board at"
1589 <<
" ROC " << roc_id
1590 <<
" Slot " << slot_number
1591 <<
" Ch " << std::setw(3) << channel_number
1592 <<
"[" << chip_address
1593 <<
"," << channel_address
1600 if(not chip_resolution_lock_flag) {
1602 this->
AddRLF(roc_id, slot_number, channel_number);
1605 std::cout <<
"There is the Resolution Lock Failed on the F1TDC board at"
1606 <<
" ROC " << roc_id
1607 <<
" Slot " << slot_number
1608 <<
" Ch " << std::setw(3) << channel_number
1609 <<
"[" << chip_address
1610 <<
"," << channel_address
1627 (diff_trigger_time == valid_trigger_time_offset[0])
1629 (diff_trigger_time == valid_trigger_time_offset[1])
1631 (diff_trigger_time == valid_trigger_time_offset[2]);
1637 if (xor_setup_flag) {
1639 if(not trig_fifo_ok_flag) {
1641 this ->
AddTFO(roc_id, slot_number, channel_number);
1644 std::cout <<
"There is the Trigger FIFO overflow at"
1645 <<
" ROC " << roc_id
1646 <<
" Slot " << slot_number
1647 <<
" Ch " << std::setw(3) << channel_number
1648 <<
"[" << chip_address
1649 <<
"," << channel_address
1660 if (not trig_time_ok_flag) {
1662 this->
AddSYN(roc_id, slot_number, channel_number);
1665 std::cout <<
"There is the Trigger Time Mismatch on the F1TDC board at"
1666 <<
" ROC " << roc_id
1667 <<
" Slot " << slot_number
1668 <<
" Ch " << std::setw(3) << channel_number
1669 <<
"[" << chip_address
1670 <<
"," << channel_address
1679 if (not event_ok_flag) {
1681 this->
AddEMM(roc_id, slot_number, channel_number);
1684 std::cout <<
"There is the Event Number Mismatch issue on the F1TDC board at"
1685 <<
" ROC " << roc_id
1686 <<
" Slot " << slot_number
1687 <<
" Ch " << std::setw(3) << channel_number
1688 <<
"[" << chip_address
1689 <<
"," << channel_address
1696 if(data_integrity_unlock_flag) {
1702 data_integrity_flag = (event_ok_flag) && (trig_time_ok_flag) && (trig_fifo_ok_flag) ;
1703 if(data_integrity_flag) data_integrity_unlock_flag =
true;
1704 else data_integrity_unlock_flag =
false;
1716 this->
AddSEU(roc_id, slot_number, channel_number);
1719 std::cout <<
"There is the Single Event Upset (SEU) on the F1TDC board at"
1720 <<
" ROC " << roc_id
1721 <<
" Slot " << slot_number
1722 <<
" Ch " << std::setw(3) << channel_number
1723 <<
"[" << chip_address
1724 <<
"," << channel_address
1733 if(fake_data_flag) {
1735 this->
AddFDF(roc_id, slot_number, channel_number);
1738 std::cout <<
"There is the Fake Data on the F1TDC board at"
1739 <<
" ROC " << roc_id
1740 <<
" Slot " << slot_number
1741 <<
" Ch " << std::setw(3) << channel_number
1742 <<
"[" << chip_address
1743 <<
"," << channel_address
1763 if( slot_number == 0 ) {
1765 std::cout <<
"Slot " << slot_number <<
" is a filler word,"
1766 <<
" then we ignore it." << std::endl;
1769 else if( slot_number == 30 ) {
1776 std::cout <<
"Slot " << slot_number <<
" is a junk word,"
1777 <<
" then we ignore it." << std::endl;
1781 std::cout <<
"Slot " << slot_number <<
" is not in the reasonable slot,"
1782 <<
" then we ignore it, but it is better to check what it is going on CODA stream." << std::endl;
1791 return (data_integrity_flag);
1797 const char* opt =
"TEXT";
1825 TSeqCollection *file_list = gROOT->GetListOfFiles();
1829 Int_t size = file_list->GetSize();
1832 error_summary_name +=
"_F1TDCs_Status";
1834 for (Int_t i=0; i<size; i++)
1836 TFile *file = (TFile*) file_list->At(i);
1839 TH2F *error_hist = (TH2F*) file->FindObjectAny(hist_name);
1840 if (not error_hist) {
1846 TList *error_summary = (TList*) file->FindObjectAny(error_summary_name);
1847 if (not error_summary) {
1852 std::cout <<
"i " << i
1854 <<
" error_summary_name " << error_summary_name
1900 return ( (slot==20) and (chan==30) );
1948 const Int_t bank_index,
1965 const Int_t bank_index,
1967 const Int_t channel,
1992 os << std::setw(2) << f1tdcref.
fSlot;
1995 os <<
" RefTime (a.u.) ";
1998 os << std::setw(12) << f1tdcref.
fCounter;
2008 Bool_t status =
false;
2039 <<
" Bank idx " << std::setw(2) <<
fBankIndex
2040 <<
" Slot " << std::setw(2) <<
fSlot
2042 <<
" Counter " << std::setw(20) <<
fCounter
2089 std::cout << *in << std::endl;
2144 TObject* obj = NULL;
2147 while ( (obj = next()) )
2155 if( (bank_idx == bank_index) and (slot_num == slot) and (chan_num == chan) ) {
2157 F1RefSignal -> SetRefTimeAU (data);
2158 if(debug) std::cout << *F1RefSignal << std::endl;
2174 TString ref_name =
"";
2177 TObject* obj = NULL;
2180 while ( (obj = next()) )
2187 if( (bank_idx == bank_index) and (ref_name == name) ) {
2208 TObject* obj = NULL;
2211 while ( (obj = next()) )
2224 TObject* obj = NULL;
2228 std::cout <<
"F1Reference Signal Counters at System " <<
fSystemName << std::endl;
2229 while ( (obj = next()) )
2246 std::cout <<
"F1TDCReferenceContainer::SetSystemName "
2248 <<
" is already registered."
Double_t fF1TDC_resolution_ns
#define QwMessage
Predefined log drain for regular messages.
UInt_t * fF1TDC_SYN_counter
Int_t fNF1TDCReferenceSignals
Int_t GetROCNumber() const
virtual ~F1TDCReferenceContainer()
void AddQwF1TDC(QwF1TDC *in)
Double_t fF1TDC_full_range_ns
TArrayD * fReferenceSignals
Int_t GetBankIndex() const
F1TDCs configuration and reference siganls container.
Bool_t fReferenceSlotFlag
void AddSYN(Int_t roc, Int_t slot, Int_t channel)
UInt_t fF1TDC_RFM_counter
Int_t GetSlotNumber() const
void SetF1TDCBuffer(UInt_t *buffer, UInt_t num_words)
QwF1TDC * GetF1TDCwithBankIndexSLOT(Int_t bank_index, Int_t slot)
std::ostream & operator<<(std::ostream &out, const QwColor &color)
Output stream operator which uses the enum-to-escape-code mapping.
Double_t fF1TDC_trig_resolution_ns
void AddRLF(Int_t roc, Int_t slot, Int_t channel)
UInt_t GetTDCHeaderTriggerTime() const
Int_t GetF1TDCIndex() const
static const Int_t fMaxF1TDCChannelNumber
Bool_t fLocalF1RawDecodeDebug
const UInt_t & GetTDCChipAddress() const
Bool_t fLocalF1DecodeDebug
Double_t GetF1TDCTriggerRollover()
void SetSystemName(const TString name)
UInt_t GetFDF(Int_t channel) const
void AddEMM(Int_t channel)
void SetSystemName(const TString name)
TString GetErrorCounter()
Bool_t IsValidDataSlot() const
Bool_t IsHeaderXorSetup() const
const Bool_t & IsHeaderword() const
void AddSEU(Int_t roc, Int_t slot, Int_t channel)
TString GetChannelErrorCounter(Int_t channel)
void SetErrorHistOptions()
QwF1TDC * GetF1TDC(Int_t roc, Int_t slot)
TObjArray * fF1TDCReferenceSignalsList
Double_t GetF1TDC_trig_t_offset() const
#define QwVerbose
Predefined log drain for verbose messages.
one F1TDC configuration and reference signal(s) holder
Bool_t IsHitFIFOOverFlow() const
Double_t GetReferenceTimeAU(Int_t bank_index, TString name)
Bool_t CheckDataIntegrity(const UInt_t roc_id, UInt_t *buffer, UInt_t num_words)
void AddSYN(Int_t channel)
void PrintTotalErrorCounter()
UInt_t GetHFO(Int_t channel) const
Double_t fF1TDC_latency_ns
UInt_t GetTDCTriggerTime() const
const TString GetSystemName() const
void AddS30(Int_t channel)
const TString GetF1SystemName() const
virtual ~QwF1TDContainer()
void PrintChannelErrorCounter(Int_t channel)
Int_t GetF1BankIndex() const
Int_t GetChannelNumber() const
UInt_t * fF1TDC_FDF_counter
Bool_t CheckSlot20Chan30(Int_t slot, Int_t chan)
void WriteErrorSummary(Bool_t hist_flag=true)
void AddRLF(Int_t channel)
UInt_t * fF1TDC_SEU_counter
Bool_t IsNotHeaderTrigFIFO() const
void AddFDF(Int_t channel)
Bool_t IsSyncMode() const
UInt_t * fF1TDC_TFO_counter
const UInt_t & GetTDCSlotNumber() const
const Double_t GetRefTimeAU() const
UInt_t GetTDCEventNumber() const
Int_t GetChannelNumber() const
F1TDCReferenceContainer()
const UInt_t & GetTDCChannelNumber() const
const UInt_t & GetTDCChannelAddress() const
void AddSEU(Int_t channel)
void AddTFO(Int_t roc, Int_t slot, Int_t channel)
A logfile class, based on an identical class in the Hermes analyzer.
Double_t ReferenceSignalCorrection(Double_t raw_time, Double_t ref_time)
Bool_t IsNormResolution() const
UInt_t GetTFO(Int_t channel) const
void AddHFO(Int_t roc, Int_t slot, Int_t channel)
UInt_t GetTDCHeaderEventNumber() const
Double_t ReferenceSignalCorrection(Double_t raw_time, Double_t ref_time, Int_t bank_index, Int_t slot)
void AddF1TDCReferenceSignal(F1TDCReferenceSignal *in)
TString GetTotalErrorCounter()
void SetReferenceSignal(Int_t bank_index, Int_t slot, Int_t chan, UInt_t data, Bool_t debug=false)
void AddOFO(Int_t channel)
Bool_t IsResolutionLock() const
Double_t DoneF1TDCsConfiguration()
UInt_t * fF1TDC_OFO_counter
UInt_t GetSEU(Int_t channel) const
void PrintF1TDCConfigure()
void AddTFO(Int_t channel)
Bool_t IsOutputFIFOOverFlow() const
const TH2F * GetF1TDCErrorHist()
UInt_t * fF1TDC_HFO_counter
UInt_t * fF1TDC_S30_counter
void AddS30(Int_t roc, Int_t slot, Int_t channel)
Double_t fF1TDC_trig_t_offset
EQwDetectorType fDetectorType
EQwRegionID GetRegion() const
QwF1TDC * GetF1TDCwithIndex(Int_t tdc_index)
UInt_t GetRLF(Int_t channel) const
void AddFDF(Int_t roc, Int_t slot, Int_t channel)
void AddOFO(Int_t roc, Int_t slot, Int_t channel)
UInt_t GetSYN(Int_t channel) const
static std::ostream & endl(std::ostream &)
End of the line.
static const Int_t fWordsPerBuffer
Bool_t CheckRegisteredF1(Int_t roc, Int_t slot)
UInt_t GetEMM(Int_t channel) const
void AddHFO(Int_t channel)
const TString GetRefSignalName() const
TString PrintNoF1TDC(Int_t roc, Int_t slot)
UInt_t GetOFO(Int_t channel) const
Double_t GetF1TDCsResolution()
Double_t fF1TDC_tframe_ns
Int_t GetSlotNumber() const
void PrintCounterSummary()
#define QwWarning
Predefined log drain for warnings.
Int_t GetF1TDCChannelNumber()
Double_t GetF1TDCResolution();.
void Print(const Option_t *options=0) const
TList * GetErrorSummary()
Bool_t IsFakeData() const
Double_t fF1TDCOneResolutionNS
Double_t fF1TDC_window_ns
void DecodeTDCWord(UInt_t &word, const UInt_t roc_id)
Bool_t SetRefTimeAU(const Double_t ref_time)
UInt_t GetTotal(UInt_t *error_counter)
static const UInt_t fNoRefTimeArbUnit
UInt_t * fF1TDC_RLF_counter
UInt_t * fF1TDC_EMM_counter
Double_t GetF1TDC_resolution() const
EQwDetectorType GetDetectorType() const
void AddEMM(Int_t roc, Int_t slot, Int_t channel)
Bool_t fLocalF1ErrorDebug