16 #include "boost/bind.hpp"
51 fPMTs(source.fPMTs),fSCAs(source.fSCAs),fADCs(source.fADCs)
87 Bool_t local_debug =
false;
90 TString varvalue =
"";
101 Int_t ts_chan_num_to_plane = 0;
102 Int_t ts_chan_type_to_element = 0;
104 Int_t reference_counter = 0;
121 while (mapstr.ReadNextLine())
123 mapstr.TrimComment(
'!');
124 mapstr.TrimWhitespace();
125 if (mapstr.LineIsEmpty())
continue;
127 if (mapstr.HasVariablePair(
"=",varname,varvalue))
137 else if (varname==
"qdc_bank")
142 else if (varname==
"sca_bank")
147 else if (varname==
"f1tdc_bank")
152 else if (varname==
"vqwk_bank")
157 else if (varname==
"slot")
166 modtype = mapstr.GetTypedNextToken<TString>();
167 modnum = mapstr.GetTypedNextToken<Int_t>();
168 channum = mapstr.GetTypedNextToken<Int_t>();
169 dettype = mapstr.GetTypedNextToken<TString>();
170 name = mapstr.GetTypedNextToken<TString>();
172 if (local_debug) printf(
"%8s, %d, %d %s, %s\n", modtype.Data(), modnum, channum, dettype.Data(), name.Data());
178 fADCs.push_back(localchannel);
184 else if (modtype==
"SIS3801")
187 localchannel.SetNeedsExternalClock(kFALSE);
188 fSCAs.push_back(localchannel);
190 Int_t offset = QwSIS3801D24_Channel::GetBufferOffset(modnum,channum);
200 else if (modtype==
"V792" )
228 else if( modtype==
"F1TDC") {
242 if (name==
"ref_t_f1") {
251 package = kPackageNull;
258 ts_chan_num_to_plane = 0;
260 if (name==
"front_f1") {
261 ts_chan_type_to_element = 1;
263 else if (name==
"back__f1") {
264 ts_chan_type_to_element = 2;
266 else if (name==
"coinc_f1") {
267 ts_chan_type_to_element = 0;
270 ts_chan_type_to_element = -1;
286 std::cerr <<
"LoadChannelMap: Unknown line: " << mapstr.GetLine().c_str()
299 Int_t unused_size_counter = 0;
304 for(
size_t slot_size =0; slot_size <
fModuleIndex.at(i).size(); slot_size++)
309 std::cout <<
"[" << i <<
","<< slot_size <<
"] "
310 <<
" module index " << m_idx
314 unused_size_counter++;
321 printf(
"Total unused size of fModuleIndex vector %6d\n", unused_size_counter);
325 std::cout <<
"[" << i <<
"] "
331 printf(
"\n------------- QwScanner LoadChannelMap End%s\n\n", mapfile.Data());
342 Bool_t ldebug=kFALSE;
350 while (mapstr.ReadNextLine())
353 mapstr.TrimComment(
'!');
354 mapstr.TrimWhitespace();
355 if (mapstr.LineIsEmpty())
continue;
357 TString varname, varvalue;
358 if (mapstr.HasVariablePair(
"=",varname,varvalue))
361 Double_t value = atof(varvalue.Data());
362 if (varname==
"helicityfrequency")
366 else if (varname==
"homepositionx")
370 else if (varname==
"homepositiony")
374 else if (varname==
"cal_factor_vqwk_x")
378 else if (varname==
"cal_factor_vqwk_y")
382 else if (varname==
"cal_factor_qdc_x")
386 else if (varname==
"cal_factor_qdc_y")
390 else if (varname==
"voltage_offset_x")
394 else if (varname==
"voltage_offset_y")
398 else if (varname==
"channel_offset_x")
402 else if (varname==
"channel_offset_y")
406 if (ldebug) std::cout<<
"inputs for "<<varname<<
": "<<value<<
"\n";
411 varname = mapstr.GetTypedNextToken<TString>();
413 varname.Remove(TString::kBoth,
' ');
414 Double_t varped = mapstr.GetTypedNextToken<Double_t>();
415 Double_t varcal = mapstr.GetTypedNextToken<Double_t>();
417 std::cout<<
"inputs for channel "<<varname
418 <<
": ped="<<varped<<
", cal="<<varcal<<
"\n";
421 if (ldebug) std::cout<<
" line read in the parameter file ="<<lineread<<
" \n";
443 for (
size_t i=0; i<
fPMTs.size(); i++)
445 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
447 fPMTs.at(i).at(j).SetValue(0);
451 for (
size_t i=0; i<
fSCAs.size(); i++)
453 fSCAs.at(i).ClearEventData();
456 for (
size_t i=0; i<
fADCs.size(); i++)
458 fADCs.at(i).ClearEventData();
468 TString subsystem_name;
470 Int_t bank_index = 0;
473 UInt_t vme_slot_num = 0;
475 Bool_t local_debug =
false;
484 <<
" local_f1tdc " << local_f1tdc <<
"\n";
490 std::cout <<
"-----------------------------------------------------" << std::endl;
492 std::cout <<
"QwScanner : "
495 <<
"ProcessConfigurationBuffer"
498 << std::setw(2) << roc_id
499 <<
" Bank [index,id]["
511 vme_slot_num = slot_id;
515 <<
"Slot [id, VME num] ["
516 << std::setw(2) << slot_id
518 << std::setw(2) << vme_slot_num
528 if (tdc_index not_eq -1) {
530 if(local_f1tdc)
delete local_f1tdc; local_f1tdc = 0;
532 local_f1tdc =
new QwF1TDC(roc_id, vme_slot_num);
542 std::cout <<
"F1TDC index "
556 std::cout <<
"Unused in "
560 <<
" local_f1tdc at "
570 if (slot_id == 0) std::cout <<
" ";
571 else if (slot_id == 1) std::cout <<
"MVME CPU ";
572 else std::cout <<
"Trigger Interface";
577 if(local_debug) std::cout << std::endl;
584 std::cout <<
"-----------------------------------------------------" << std::endl;
601 std::cout <<
"FocalPlaneScanner::ProcessEvBuffer: "
602 <<
"Begin processing ROC" << roc_id <<
", Bank "<<bank_id
603 <<
"(hex: "<<std::hex<<bank_id<<std::dec<<
")"
604 <<
", num_words "<<num_words<<
", index "<<index<<std::endl;
609 if (index>=0 && num_words>0) {
612 UInt_t words_read = 0;
613 for (
size_t i=0; i<
fADCs.size(); i++) {
621 else if (bank_id==
fBankID[2]) {
626 Bool_t local_debug_f1 =
false;
628 Int_t bank_index = 0;
632 Int_t dummy_slot_number = 0;
633 Int_t dummy_chan_number = 0;
635 Bool_t data_integrity_flag =
false;
636 Bool_t temp_print_flag =
false;
638 UInt_t hit_counter = 0;
642 if (bank_index>=0 && num_words>0) {
669 if (data_integrity_flag) {
671 dummy_slot_number = 0;
672 dummy_chan_number = 0;
674 for (UInt_t i=0; i<num_words ; i++) {
685 if ( tdc_slot_number == 31) {
705 if (dummy_slot_number == tdc_slot_number && dummy_chan_number == tdc_chan_number) {
713 printf(
"QwScanner::ProcessEvBuffer: [%4d] hit counter %d, bank_index %2d slot_number [%2d,%2d] chan [%2d,%2d] data %10d %10.2f\n", i, hit_counter,
717 if (hit_counter == 0) {
718 FillRawWord (bank_index, tdc_slot_number, tdc_chan_number, tdc_data);
724 FillRawTDCWord(bank_index, tdc_slot_number, tdc_chan_number, tdc_data);
726 dummy_slot_number = tdc_slot_number;
727 dummy_chan_number = tdc_chan_number;
731 catch (std::exception&
e) {
732 std::cerr <<
"Standard exception from QwScanner::FillRawWord: "
733 << e.what() << std::endl;
734 std::cerr <<
" Parameters: index==" <<bank_index
735 <<
"; GetF1SlotNumber()==" <<tdc_slot_number
736 <<
"; GetF1ChannelNumber()=="<<tdc_chan_number
737 <<
"; GetF1Data()==" <<tdc_data
844 else if (bank_id==
fBankID[1]) {
847 if (buffer[0]/32!=1)
return 0;
849 if (index>=0 && num_words>0) {
854 UInt_t words_read = 0;
855 for (
size_t i=0; i<
fSCAs.size(); i++) {
863 if (index>=0 && num_words>0)
867 if (
fDEBUG) std::cout <<
"FocalPlaneScanner::ProcessEvBuffer: "
868 <<
"Begin processing ROC" << roc_id <<
", Bank "<<bank_id
869 <<
"(hex: "<<std::hex<<bank_id<<std::dec<<
")"<< std::endl;
873 std::cout<<
"QwScanner::ProcessEvBuffer (trig) Data: \n";
875 for (
size_t i=0; i<num_words ; i++)
887 std::cout<<
"This is a valid QDC/TDC data word. Index="<<index
900 catch (std::exception&
e)
902 std::cerr <<
"Standard exception from FocalPlaneScanner::FillRawTDCWord: "
903 << e.what() << std::endl;
905 std::cerr <<
" Parameters: index=="<<index
907 <<
"; GetV775ChannelNumber()=="<<chan
911 std::cerr <<
" GetModuleIndex()=="<<modindex
912 <<
"; fModulePtrs.at(modindex).size()=="
914 <<
"; fModulePtrs.at(modindex).at(chan).first {module type}=="
916 <<
"; fModulePtrs.at(modindex).at(chan).second {signal index}=="
975 TString elementname =
"";
977 Double_t rawtime_arb_unit = 0.0;
978 Double_t corrected_time_arb_unit = 0.0;
979 Double_t time_ns = 0.0;
982 Int_t bank_index = 0;
985 for (
size_t i=0; i<
fPMTs.size(); i++)
987 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
989 elementname =
fPMTs.at(i).at(j).GetElementName();
992 if (elementname.EndsWith(
"f1") ) {
993 rawtime_arb_unit =
fPMTs.at(i).at(j).GetValue();
995 if ( rawtime_arb_unit not_eq 0.0) {
997 if ( not elementname.Contains(
"ref") ) {
999 bank_index =
fPMTs.at(i).at(j).GetSubbankID();
1000 slot_num =
fPMTs.at(i).at(j).GetModule();
1003 fPMTs.at(i).at(j).SetValue(time_ns);
1009 fPMTs.at(i).at(j).SetValue(rawtime_arb_unit);
1013 fPMTs.at(i).at(j).SetValue(rawtime_arb_unit);
1018 fPMTs.at(i).at(j).ProcessEvent();
1057 for (
size_t i=0; i<
fADCs.size(); i++)
1059 fADCs.at(i).ProcessEvent();
1062 for (
size_t i=0; i<
fSCAs.size(); i++)
1064 fSCAs.at(i).ProcessEvent();
1068 for (
size_t i=0; i<
fPMTs.size(); i++)
1070 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
1073 TString element_name =
fPMTs.at(i).at(j).GetElementName();
1074 Double_t tmpvalue =
fPMTs.at(i).at(j).GetValue();
1076 if (element_name==TString(
"front_adc")) {
1079 else if (element_name==TString(
"back__adc")) {
1082 else if (element_name==
"front_f1") {
1086 else if (element_name==
"back__f1") {
1091 else if (element_name==TString(
"pos_x_adc"))
1108 else if (element_name==TString(
"pos_y_adc"))
1133 for (
size_t i=0; i<
fADCs.size(); i++)
1136 const double volts_per_bit = (20./(1<<18));
1140 num_samples =
fADCs.at(
fADCs_map[
"power_vqwk"]).GetNumberOfSamples();
1148 num_samples =
fADCs.at(
fADCs_map[
"pos_x_vqwk"]).GetNumberOfSamples();
1158 num_samples =
fADCs.at(
fADCs_map[
"pos_y_vqwk"]).GetNumberOfSamples();
1167 for (
size_t i=0; i<
fSCAs.size(); i++)
1183 if (folder != NULL) folder->cd();
1185 TString basename = prefix +
"scanner_";
1188 for (
size_t i=0; i<
fPMTs.size(); i++)
1190 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
1191 fPMTs.at(i).at(j).ConstructHistograms(folder,basename);
1194 for (
size_t i=0; i<
fSCAs.size(); i++)
1196 fSCAs.at(i).ConstructHistograms(folder,basename);
1199 for (
size_t i=0; i<
fADCs.size(); i++)
1201 fADCs.at(i).ConstructHistograms(folder,basename);
1215 fRateMapCM =
new TProfile2D(
"scanner_rate_map_cm",
1216 "Scanner Rate Map (Current Mode)",110,-55.0,55.0,40,-360.0,-320.0);
1217 fRateMapCM->GetXaxis()->SetTitle(
"PositionX [cm]");
1218 fRateMapCM->GetYaxis()->SetTitle(
"PositionY [cm]");
1221 fRateMapEM =
new TProfile2D(
"scanner_rate_map_em",
1222 "Scanner Rate Map (Event Mode)",110,-55.0,55.0,40,-360.0,-320.0);
1223 fRateMapEM->GetXaxis()->SetTitle(
"PositionX [cm]");
1224 fRateMapEM->GetYaxis()->SetTitle(
"PositionY [cm]");
1247 for (
size_t i=0; i<
fPMTs.size(); i++)
1249 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
1251 fPMTs.at(i).at(j).FillHistograms();
1256 for (
size_t i=0; i<
fSCAs.size(); i++)
1258 fSCAs.at(i).FillHistograms();
1262 for (
size_t i=0; i<
fADCs.size(); i++)
1264 fADCs.at(i).FillHistograms();
1272 if (
fHistograms.at(j)->GetTitle()==TString(
"scanner_position_x"))
1277 if (
fHistograms.at(j)->GetTitle()==TString(
"scanner_position_y"))
1282 if (
fHistograms.at(j)->GetTitle()==TString(
"scanner_ref_posi_x"))
1287 if (
fHistograms.at(j)->GetTitle()==TString(
"scanner_ref_posi_y"))
1329 values.push_back(0.0);
1330 TString list = prefix +
"PowSupply_VQWK/D";
1331 values.push_back(0.0);
1332 list +=
":" + prefix +
"PositionX_VQWK/D";
1333 values.push_back(0.0);
1334 list +=
":" + prefix +
"PositionY_VQWK/D";
1335 values.push_back(0.0);
1336 list +=
":" + prefix +
"FrontSCA/D";
1337 values.push_back(0.0);
1338 list +=
":" + prefix +
"BackSCA/D";
1339 values.push_back(0.0);
1340 list +=
":" + prefix +
"CoincidenceSCA/D";
1341 values.push_back(0.0);
1342 list +=
":" + prefix +
"FrontADC/D";
1343 values.push_back(0.0);
1344 list +=
":" + prefix +
"BackADC/D";
1345 values.push_back(0.0);
1346 list +=
":" + prefix +
"FrontTDC/D";
1347 values.push_back(0.0);
1348 list +=
":" + prefix +
"BackTDC/D";
1349 values.push_back(0.0);
1352 list +=
":" + prefix +
"PositionX_QDC/D";
1353 values.push_back(0.0);
1354 list +=
":" + prefix +
"PositionY_QDC/D";
1357 for (
size_t i=0; i<
fPMTs.size(); i++) {
1358 for (
size_t j=0; j<
fPMTs.at(i).size(); j++) {
1359 if (
fPMTs.at(i).at(j).GetElementName() !=
"") {
1360 values.push_back(0.0);
1361 list +=
":" +
fPMTs.at(i).at(j).GetElementName() +
"_raw/D";
1366 for (
size_t i=0; i<
fSCAs.size(); i++) {
1367 if (
fSCAs.at(i).GetElementName() !=
"") {
1368 values.push_back(0.0);
1369 list +=
":" +
fSCAs.at(i).GetElementName() +
"_raw/D";
1373 for (
size_t i=0; i<
fADCs.size(); i++) {
1374 TString channelname =
fADCs.at(i).GetElementName();
1375 channelname.ToLower();
1376 if ( (channelname ==
"")
1377 || (channelname ==
"empty")
1378 || (channelname ==
"spare")) {}
1380 values.push_back(0.0);
1381 list +=
":" +
fADCs.at(i).GetElementName() +
"_raw/D";
1388 TString basename =
"scanner";
1416 for (
size_t i=0; i<
fPMTs.size(); i++) {
1417 for (
size_t j=0; j<
fPMTs.at(i).size(); j++) {
1418 if (
fPMTs.at(i).at(j).GetElementName() !=
"") {
1419 values[index++] =
fPMTs.at(i).at(j).GetValue();
1424 for (
size_t i=0; i<
fSCAs.size(); i++) {
1425 if (
fSCAs.at(i).GetElementName() !=
"") {
1426 values[index++] =
fSCAs.at(i).GetValue();
1431 for (
size_t i=0; i<
fADCs.size(); i++) {
1432 TString channelname =
fADCs.at(i).GetElementName();
1433 channelname.ToLower();
1434 if ( (channelname ==
"")
1435 || (channelname.BeginsWith(
"empty"))
1436 || (channelname.BeginsWith(
"spare")) ) { }
1439 values[index++] =
fADCs.at(i).GetAverageVolts();
1449 std::cout <<
"Configuration of the focal plane scanner:"<< std::endl;
1450 for (
size_t i = 0; i<
fROC_IDs.size(); i++)
1452 for (
size_t j=0; j<
fBank_IDs.at(i).size(); j++)
1456 std::cout <<
"ROC " <<
fROC_IDs.at(i)
1457 <<
", subbank 0x" << std::hex<<
fBank_IDs.at(i).at(j)<<std::dec
1458 <<
": subbank index==" << ind << std::endl;
1465 if (QadcTdcindex != -1)
1467 std::cout <<
" Slot "<<k<<
" Module#"<<QadcTdcindex<< std::endl;
1473 std::cout <<
" Number of SIS3801 Scaler: " <<
fSCAs.size() << std::endl;
1477 std::cout <<
" F1TDC added." << std::endl;
1481 std::cout <<
" Number of TRIUMF ADC: " <<
fADCs.size() << std::endl;
1491 if (
typeid(*value) !=
typeid(*
this)) {
1492 QwError <<
"QwScanner::Compare: "
1493 <<
"value is " <<
typeid(*value).name() <<
", "
1494 <<
"but this is " <<
typeid(*this).name() <<
"!"
1502 QwError <<
"QwScanner::Compare: "
1503 <<
"value is " << input->
fSCAs.size() <<
"," << input->
fPMTs.size() <<
"," << input->
fADCs.size() <<
", "
1504 <<
"but this is " <<
fSCAs.size() <<
"," <<
fPMTs.size() <<
"," <<
fADCs.size() <<
"!"
1519 for (
size_t i = 0; i <
fPMTs.size(); i++)
1520 for (
size_t j = 0; j <
fPMTs.at(i).size(); j++)
1521 fPMTs.at(i).at(j) = input->
fPMTs.at(i).at(j);
1522 for (
size_t i = 0; i <
fADCs.size(); i++)
1524 for (
size_t i = 0; i <
fSCAs.size(); i++)
1546 for (
size_t i = 0; i < 4; i++)
1550 QwError <<
"QwScanner::operator=: Problems!!!"
1565 for (
size_t i = 0; i <
fADCs.size(); i++)
1567 for (
size_t i = 0; i <
fSCAs.size(); i++)
1575 QwError <<
"QwScanner::operator+=: Problems!!!"
1590 for (
size_t i = 0; i <
fADCs.size(); i++)
1592 for (
size_t i = 0; i <
fSCAs.size(); i++)
1600 QwError <<
"QwScanner::operator-=: Problems!!!"
1647 std::cout<<
"QwScanner::RegisterSubbank()"
1648 <<
" ROC " << current_roc_id
1649 <<
" Subbank " << bank_id
1666 std::pair<EQwModuleType, Int_t> tmppair;
1668 tmppair.second = -1;
1690 std::cerr <<
"QwScanner::RegisterSlotNumber: Slot number "
1691 << slot_id <<
" is larger than the number of slots per ROC, "
1699 moduletype.ToUpper();
1704 if (moduletype==
"V792")
1714 else if (moduletype==
"V775")
1724 else if (moduletype==
"F1TDC")
1734 else if (moduletype==
"SIS3801")
1763 Int_t chan, UInt_t data)
1773 Int_t chanindex =
fModulePtrs.at(modindex).at(chan).second;
1782 fPMTs.at(modtype).at(chanindex).SetValue(data);
1783 fPMTs.at(modtype).at(chanindex).SetSubbankID(bank_index);
1784 fPMTs.at(modtype).at(chanindex).SetModule(slot_num);
1796 Bool_t local_debug =
false;
1803 if (tdcindex not_eq -1) {
1811 Int_t plane =
fDetectorIDs.at(tdcindex).at(chan).fPlane;
1812 Int_t element =
fDetectorIDs.at(tdcindex).at(chan).fElement;
1814 Int_t octant =
fDetectorIDs.at(tdcindex).at(chan).fOctant;
1818 printf(
"tdcindx %d bank_idx %d, slot %d, plane %d, element %d, package %d\n",
1820 bank_index, slot_num, (Int_t) plane, (Int_t) element, (Int_t) package);
1823 if (plane == -1 or element == -1){
1846 direction =
fDetectorIDs.at(tdcindex).at(chan).fDirection;
1855 std::cout <<
"At QwMainDetector::FillRawTDCWord "
1856 <<
" bank index " << bank_index
1857 <<
" slot num " << slot_num
1858 <<
" chan num " << chan
1859 <<
" hitcnt " << hitcnt
1860 <<
" plane " << plane
1861 <<
" wire " << element
1862 <<
" package " <<
package
1863 << " diection " << direction
1865 << " fTDCHits.size() " << fTDCHits.size()
1899 std::vector<Double_t> reftimes;
1900 std::vector<Bool_t> refchecked;
1901 std::vector<Bool_t> refokay;
1905 std::size_t ref_size = 0;
1911 reftimes.resize ( ref_size );
1912 refchecked.resize( ref_size );
1913 refokay.resize ( ref_size );
1915 for ( i=0; i<ref_size; i++ ) {
1916 reftimes.at(i) = 0.0;
1917 refchecked.at(i) = kFALSE;
1918 refokay.at(i) = kFALSE;
1921 allrefsokay = kTRUE;
1925 UInt_t bank_index = 0;
1926 Double_t raw_time_arb_unit = 0.0;
1927 Double_t ref_time_arb_unit = 0.0;
1928 Double_t time_arb_unit = 0.0;
1930 Bool_t local_debug =
false;
1932 for ( std::vector<QwHit>::iterator hit=
fTDCHits.begin(); hit!=
fTDCHits.end(); hit++ )
1936 bank_index = hit->GetSubbankID();
1940 if ( not refchecked.at(bank_index) ) {
1943 std::cout <<
"QwScanner::SubtractReferenceTimes: Subbank ID "
1944 << bank_index <<
" is missing a reference time." << std::endl;
1945 refokay.at(bank_index) = kFALSE;
1946 allrefsokay = kFALSE;
1950 std::cout <<
"Multiple hits are recorded in the reference channel, we use the first hit signal as the refererence signal." << std::endl;
1953 refokay.at(bank_index) = kTRUE;
1956 if (refokay.at(bank_index)){
1967 refchecked.at(bank_index) = kTRUE;
1970 if ( refokay.at(bank_index) ) {
1971 Int_t slot_num = hit -> GetModule();
1972 raw_time_arb_unit = (Double_t) hit -> GetRawTime();
1973 ref_time_arb_unit = (Double_t) reftimes.at(bank_index);
1977 hit -> SetTime(time_arb_unit);
1978 hit -> SetRawRefTime((UInt_t) ref_time_arb_unit);
1982 <<
" BankIndex " << std::setw(2) << bank_index
1983 <<
" Slot " << std::setw(2) << slot_num
1984 <<
" RawTime : " << std::setw(6) << raw_time_arb_unit
1985 <<
" RefTime : " << std::setw(6) << ref_time_arb_unit
1986 <<
" time : " << std::setw(6) << time_arb_unit
1995 if ( not allrefsokay ) {
1996 std::vector<QwHit> tmp_hits;
1998 for ( std::vector<QwHit>::iterator hit=
fTDCHits.begin(); hit!=
fTDCHits.end(); hit++ )
2000 bank_index = hit->GetSubbankID();
2001 if ( refokay.at(bank_index) ) tmp_hits.push_back(*hit);
2040 for(std::vector<QwHit>::iterator iter=
fTDCHits.begin(); iter!=
fTDCHits.end(); ++iter)
2064 Int_t modindex = -1;
2079 Int_t chanindex = -1;
2080 if (modtype < (Int_t)
fPMTs.size())
2082 for (
size_t chan = 0; chan <
fPMTs.at(modtype).size(); chan++)
2084 if (name ==
fPMTs.at(modtype).at(chan).GetElementName())
2097 for (
size_t i=0; i<
fADCs.size(); i++)
2098 fADCs.at(i).SetPedestal(pedestal);
2103 for (
size_t i=0; i<
fADCs.size(); i++)
2104 fADCs.at(i).SetCalibrationFactor(calib);
2113 for (
size_t i=0; i<
fADCs.size(); i++)
2114 fADCs.at(i).InitializeChannel(name,datatosave);
2120 std::cout <<
"QwScanner: " <<
fSystemName << std::endl;
2122 for (
size_t i=0; i<
fADCs.size(); i++)
2123 fADCs.at(i).PrintInfo();
2125 for (
size_t i=0; i<
fPMTs.size(); i++)
2126 for (
size_t j=0; j<
fPMTs.at(i).size(); j++)
2127 fPMTs.at(i).at(j).PrintInfo();
Int_t GetSubbankIndex() const
Int_t RegisterROCNumber(const UInt_t roc_id)
#define QwMessage
Predefined log drain for regular messages.
Int_t RegisterSubbank(const UInt_t bank_id)
void AddQwF1TDC(QwF1TDC *in)
std::map< TString, TString > fDetectorMaps
Int_t ProcessEvBuffer(const UInt_t roc_id, const UInt_t bank_id, UInt_t *buffer, UInt_t num_words)
TODO: The non-event-type-aware ProcessEvBuffer routine should be replaced with the event-type-aware v...
void ConstructBranchAndVector(TTree *tree, TString &prefix, std::vector< Double_t > &values)
Construct the branch and tree vector.
std::vector< QwHit > fTDCHits
F1TDCs configuration and reference siganls container.
Double_t fCal_Factor_VQWK_X
UInt_t GetTDCChannelNumber()
Bool_t Compare(VQwSubsystem *value)
void FillHistograms()
Fill the histograms for this subsystem.
void SetF1TDCBuffer(UInt_t *buffer, UInt_t num_words)
const UInt_t & GetTDCMaxChannels() const
Double_t fHelicityFrequency
variables for calibrating and calculating scanner positions
void SubtractReferenceTimes()
Double_t fF1TDCResolutionNS
Int_t RegisterSlotNumber(const UInt_t slot_id)
static UInt_t GetUInt(const TString &varvalue)
VQwSubsystem & operator+=(VQwSubsystem *value)
std::vector< std::vector< std::pair< EQwModuleType, Int_t > > > fModulePtrs
std::vector< QwVQWK_Channel > fADCs
Int_t LinkChannelToSignal(const UInt_t chan, const TString &name)
std::vector< Int_t > fADCs_offset
Int_t fCurrentBankIndex
Name of this subsystem (the region).
const UInt_t & GetTDCData() const
Int_t LoadInputParameters(TString parameterfile)
Mandatory parameter file definition.
Double_t fCal_Factor_QDC_Y
std::vector< TH1_ptr > fHistograms
Histograms associated with this data element.
virtual ~QwScanner()
Virtual destructor.
Bool_t HasDataLoaded() const
one F1TDC configuration and reference signal(s) holder
Virtual base class for the parity subsystems.
static const Bool_t bStoreRawData
Bool_t CheckDataIntegrity(const UInt_t roc_id, UInt_t *buffer, UInt_t num_words)
std::vector< std::vector< Double_t > > fReferenceData
static const Int_t kF1ReferenceChannelNumber
void ReportConfiguration(Bool_t verbose)
EQwModuleType RegisterModuleType(TString moduletype)
std::vector< std::pair< Int_t, Int_t > > fReferenceChannels
Bool_t IsSlotRegistered(Int_t bank_index, Int_t slot_num) const
void FillTreeVector(std::vector< Double_t > &values) const
Fill the tree vector.
void InitializeChannel(TString name, TString datatosave)
virtual void ConstructHistograms()
Construct the histograms for this subsystem.
void SetPedestal(Double_t ped)
void WriteErrorSummary(Bool_t hist_flag=true)
const UInt_t & GetTDCSlotNumber() const
UInt_t fEventTypeMask
Mask of event types.
void FillRawWord(Int_t bank_index, Int_t slot_num, Int_t chan, UInt_t data)
Bool_t MatchDeviceParamsFromList(const std::string &devicename)
Int_t ProcessConfigurationBuffer(const UInt_t roc_id, const UInt_t bank_id, UInt_t *buffer, UInt_t num_words)
std::vector< Int_t > fSCAs_offset
virtual VQwSubsystem & operator=(VQwSubsystem *value)
Assignment Note: Must be called at the beginning of all subsystems routine call to operator=(VQwSubsy...
Double_t fCal_Factor_QDC_X
const UInt_t & GetTDCChannelNumber() const
void ClearAllBankRegistrations()
Double_t fVoltage_Offset_X
Double_t fMeanPositionY_ADC
void ProcessOptions(QwOptions &options)
Process the command line options.
void DecodeTDCWord(UInt_t &word, const UInt_t roc_id=0)
TString fSystemName
Name of this subsystem.
size_t fTreeArrayIndex
Tree indices.
std::map< TString, size_t > fADCs_map
Double_t ReferenceSignalCorrection(Double_t raw_time, Double_t ref_time, Int_t bank_index, Int_t slot)
void FillHardwareErrorSummary()
Hardware error summary.
UInt_t GetTDCSlotNumber()
VQwSubsystem & operator=(VQwSubsystem *value)
Assignment Note: Must be called at the beginning of all subsystems routine call to operator=(VQwSubsy...
std::vector< std::vector< QwPMT_Channel > > fPMTs
Double_t DoneF1TDCsConfiguration()
Double_t fChannel_Offset_X
Bool_t WireMatches(EQwRegionID region, EQwDetectorPackage package, Int_t plane, Int_t wire)
Int_t GetModuleIndex(size_t bank_index, size_t slot_num) const
QwHistogramHelper gQwHists
Globally defined instance of the QwHistogramHelper class.
Bool_t IsValidDataword() const
Double_t fChannel_Offset_Y
The pure virtual base class of all subsystems.
UInt_t kMaxNumberOfChannelsPerModule
void SetF1BankIndex(const Int_t bank_index)
Double_t fCal_Factor_VQWK_Y
EQwModuleType fCurrentType
const MQwF1TDC GetF1TDCDecoder() const
class QwScaler_Channel< 0x00ffffff, 0 > QwSIS3801D24_Channel
void SetF1SystemName(const TString name)
std::vector< std::vector< UInt_t > > fBank_IDs
Vector of Bank IDs per ROC ID associated with this subsystem.
Int_t fCurrentROC_ID
ROC ID that is currently being processed.
Int_t RegisterSubbank(const UInt_t bank_id)
Tell the object that it will decode data from this sub-bank in the ROC currently open for registratio...
Int_t fCurrentModuleIndex
virtual Int_t RegisterROCNumber(const UInt_t roc_id, const UInt_t bank_id=0)
Tell the object that it will decode data from this ROC and sub-bank.
static std::ostream & endl(std::ostream &)
End of the line.
void PrintInfo() const
Print some information about the subsystem.
std::vector< UInt_t > fROC_IDs
Vector of ROC IDs associated with this subsystem.
void SetF1TDCIndex(const Int_t tdc_index)
std::vector< std::vector< QwDetectorID > > fDetectorIDs
static const UInt_t kMaxNumberOfModulesPerROC
Double_t fMeanPositionX_ADC
Bool_t IsF1ReferenceChannel(Int_t slot, Int_t chan)
Hit structure uniquely defining each hit.
Int_t LoadChannelMap(TString mapfile)
Mandatory map file definition.
static Int_t GetBufferOffset(Int_t moduleindex, Int_t channelindex)
Double_t ReturnTimeCalibration(Double_t time_arb_unit)
void Print(const Option_t *options=0) const
std::vector< std::vector< Int_t > > fModuleIndex
Int_t FindSignalIndex(const EQwModuleType modtype, const TString &name) const
std::vector< QwSIS3801D24_Channel > fSCAs
QwF1TDContainer * fF1TDContainer
VQwSubsystem & operator-=(VQwSubsystem *value)
Double_t fVoltage_Offset_Y
void FillRawTDCWord(Int_t bank_index, Int_t slot_num, Int_t chan, UInt_t data)
void DecodeTDCWord(UInt_t &word, const UInt_t roc_id)
TH1F * Construct1DHist(const TString &inputfile, const TString &name_title)
size_t fTreeArrayNumEntries
void ClearAllBankRegistrations()
Clear all registration of ROC and Bank IDs for this subsystem.
std::map< TString, size_t > fSCAs_map
QwScanner()
Private default constructor (not implemented, will throw linker error on use)
#define RegisterSubsystemFactory(A)
#define QwError
Predefined log drain for errors.
TString GetSubsystemName() const
std::vector< EQwModuleType > fModuleTypes
Module index, indexed by bank_index and slot_number.
void SetDataLoaded(Bool_t flag)
void SetCalibrationFactor(Double_t calib)